1. Field of the Invention
The invention relates to high reliability integrated circuit memories and more particularly to memories having repair circuits.
2. Description of the Prior Art
An integrated circuit memory is in the form of a semiconductor chip having microscopic electronic circuits arranged with respect to each other and which may contain by their electric states digitized information. The development of the technique for manufacturing memories tends towards increasing the density of the circuits contained in the memories, as well as increasing the size of the memories themselves. The reasons for this development are essentially related to the greater reliability of integrated circuits with respect to comparable organizations made with discrete elements. This desired technical development meets with a major difficulty: the possibility of effectively manufacturing the designed memory circuits. The increase in density of the circuits leads manufacturers to construct memories whose elementary pitch is of the order of a micrometer. Consequently, the photolithographic masks used for manufacturing memories must be precision made: they are expensive.
Furthermore, the technical development of circuits is such that the commercial interest of these circuits is limited in time. They become rapidly obsolete. For this reason, manufacturers do not have sufficient time for improving the productivity of their machines. The yields of such manufacturing machines are always less than one. The manufacture, or rather sampling, of the memories is therefore followed by a phase for verifying the quality of the memories manufactured: the defective parts are rejected. The rejects are all the more numerous the larger the memories to be manufactured or the smaller their manufacturing pitch or else the more recent the design of the circuit. To overcome these drawbacks, manufacturers have thought of providing these memories with repair circuits. The purpose of the repair circuits is to substitute, in a memory, a circuit in good condition for a defective circuit. The aim of the present invention is to increase the operating efficiency of the repair circuits as well as simplifying the use of these repair circuits. The result is an increase of manufacturing efficiency.
In memories, the information is stored in memory cells. They are spaced apart in a matrix in lines and columns. The memories also comprise decoders: at least one line decoder for selecting a line of cells and possibly a column decoder for selecting a column of cells. In the memories, the cells of the same cell line are connected to a common connection or possibly the same two complementary connections called bit lines. These bit lines convey the electric states contained, or to be contained, in the memory cells. These bit lines are biased at each end by a supply circuit and are each connected at the other end to a bit line selection circuit. The bit line selection circuits of a cell line are themselves controlled by outputs of the line decoder which correspond to the cell line in question. The repair circuits concerned by the present invention are circuits interconnected between selection circuits and the corresponding outputs of the decoder.
The purpose of these repair circuits is to disable the selection circuits of a cell line and thus to place the bit lines of this cell line out of action. When such disabling takes place, the repair circuit establishes a connection between the decoder and a repair connection. An additional cell line is connected to this repair connection. This additional line is redundant with respect to the nominal capacity of the memory. The repair circuits must then be able to be in two distinct states. In a first state, they do not interfere with the normal operation of the decoder, of the selection circuits and of the cell lines. During repair operation, they transport the selection orders assigned to the cell line in poor condition to a redundant cell line. In order to be able to assume these two states, the repair circuits of the prior art comprise a flip flop circuit connected in cascade with a fuse. In a normal situation, the fuse is not cut, the flip flop is in a first state. When it is desired to pass to a repair situation, the fuse is decomposed. Such decomposition of the fuse is obtained by external means. The flip flop then changes state.
Means are known in the prior art for melting the fuses. These means comprise essentially means for holding the semiconductor chip opposite a laser. The laser ray is moved with respect to the chip so that this ray is directed very precisely on a fuse to be melted. A laser ray pulse is sent: the fuse melts. The repair circuit then changes state and a connection is formed between the output or outputs of the decoder which corresponds to the cell line in question and a repair connection which is connected to an additional cell line. At the same time, the information concerning the change of state of the repair circuit is used for disabling the circuits selecting the cell line thus placed out of action.
Such a construction has two drawbacks. The main drawback resides in handling of the laser. On the one hand, the acquisition of the laser is expensive which increases the price of the manufactured memories, and on the other hand handling of this laser is delicate. In fact, the laser must be positioned with respect to the chip so that it aims exactly at the position of the fuse to be melted. The time lost in learning how to handle the laser, handling relative to each type of memory manufactured, reduces the commercial lifespan of the memory in question. Furthermore, it is not always sufficient to replace a defective cell line by a redundant cell line. In fact, if the defective cell line is the location of an electric short circuit, for example between one of its bit lines and a power supply circuit, the memory, which is functionally sound since it is repaired, is even so rejected during verification tests for excess electric consumption. This excess electric consumption places the circuit outside the specification ranges guaranteed by the manufacturer. Thus, all the advantages which had been hoped for cannot be expected of the repair circuits.